[6] | FE-I2: a front-end readout chip designed in a commercial $ 0.25 \mu {}m $ process for the ATLAS pixel detector at LHC (Blanquart L., et al.), In Nuclear Science, IEEE Transactions on, volume 51, 2004. |
[5] | Compact digital memory blocks for the DSSC pixel readout ASIC (Erdinger F., et al.), In Nuclear Science Symposium Conference Record (NSS/MIC), 2010 IEEE, 2010. |
[4] | Pixel readout ASIC with per pixel digitization and digital storage for the DSSC detector at XFEL (Fischer P., et al.), In Nuclear Science Symposium Conference Record (NSS/MIC), 2010 IEEE, 2010. |
[3] | The DAQ readout chain of the DSSC detector at the European XFEL (Gerlach T., et al.), In Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC), 2011 IEEE, 2011. |
[2] | Multi-channel charge pulse amplification, digitization and processing ASIC for detector applications (Armbruster T., et al.), In Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC), 2012 IEEE, 2012. |
[1] | The PPT-module: High-performance readout for the DSSC detector at XFEL (Kugel A., et al.), In Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC), 2013 IEEE, 2013. |